cystech electronics corp. spec. no. : c143v8 issued date : 2016.06.13 revised date : page no. : 1/9 mtb020a03kv8 cystek product specification dual n-channel enhancement mode mosfet mtb020a03kv8 features ? simple drive requirement ? low on-resistance ? fast switching speed ? pb-free lead plating and halogen-free package equivalent circuit outline ordering information device package shipping MTB020A03KV8-0-T6-G dfn3 3 (pb-free lead plating and halogen-free package) 3000 pcs / tape & reel mtb020a03kv8 dfn3 3 g gate s source d drain bv dss 30v 6.6a i d @v gs =10v, t a =25 c 12a i d @v gs =10v, t c =25 c r dson @v gs =10v typ. 15.2 m r dson @v gs =4.5v typ. 20.1 m d2 d1 d2 d1 d1 d2 d1 d2 s1 g2 g1 s2 s2 g1 g2 s1 pin 1 environment friendly grade : s for rohs compliant products, g for rohs compliant and green compound products packing spec, t6 : 3000 pcs / tape & reel,13? reel product rank, zero for no rank products product name
cystech electronics corp. spec. no. : c143v8 issued date : 2016.06.13 revised date : page no. : 2/9 mtb020a03kv8 cystek product specification absolute maximum ratings (t c =25 c, unless otherwise noted) parameter symbol limits unit drain-source breakdown voltage bv dss 30 gate-source voltage v gs 16 v t a =25 c, v gs =10v 6.6 continuous drain current *2 t a =70 c, v gs =10v i dsm 5.3 t c =25 c, v gs =10v 12 continuous drain current t c =100 c, v gs =10v i d 7.6 pulsed drain current * 3 i dm 48 a t a =25 c, single device operation 1.5 *2 t a =70 c, single device operation 0.96 *2 t a =25 c,single device value at dual operation 1.24 *2 t a =70 c,single device value at dual operation p dsm 0.79 *2 t c =25 c 5 total power dissipation t c =100 c p d * 1 2 w operating junction and storage temp erature range tj; tstg -55~+150 c thermal data parameter symbol value unit max. thermal resistance, junction-to-ambient, single device operation 84 *2 max. thermal resistance, junction-to-amb ient, single device value at dual operation r th,j-a 101 *2 max. thermal resistance, junction-to-case r th,j-c 25 c/w note : 1 . the power dissipation p d is based on t j(max) =150 c, using junction-to-case thermal resistance, and is more useful in setting the upper di ssipation limit for cases where additional heatsinking is used. 2 . the value of r ja is measured with the device mounted on 1 in 2fr-4 board with 2 oz. copper, in a still air environment with t a =25 c, t 5s . 216 c/w when mounted on a minimum pad of 2 oz. copper. the power dissipation p dsm is based on r ja and the maximum allowed junction temperature of 150 c. the value in any given application depends on the user?s specific board design. 3. pulse width limited by junction temperature t j(max) =150 c. ratings are based on low duty cycles to keep initial t j =25 c. n-channel electrical characteristics (tc=25 c, unless otherwise specified) symbol min. typ. max. unit test conditions static bv dss 30 - - v gs =0v, i d =250 a v gs(th) 1 - 2.5 v v ds =v gs , i d =250 a i gss - - 10 v gs =16v, v ds =0v - - 1 v ds =30v, v gs =0v i dss - - 10 a v ds =24v, v gs =0v, tj=70 c - 15.2 20 v gs =10v, i d =10a *r ds(on) - 20.1 28 m v gs =4.5v, i d =8a *g fs - 3.6 - s v ds =10v, i d =1a
cystech electronics corp. spec. no. : c143v8 issued date : 2016.06.13 revised date : page no. : 3/9 mtb020a03kv8 cystek product specification dynamic ciss - 438 - coss - 63 - crss - 47 - pf v ds =25v , v gs =0v , f=1mhz *t d(on) - 5.8 - *t r - 17.2 - *t d(off) - 33.8 - *t f - 10.4 - ns v ds =15v , i d =1a , v gs =10v , r g =6 *qg - 12.1 - *qgs - 1.7 - *qgd - 3.6 - nc v ds =24v , i d =10a , v gs =10v body diode *v sd - 0.8 1.2 v v gs= 0v, i s =2.3a *trr - 9.2 - ns *qrr - 4 - nc i s =2.3a, v gs =0v, di/dt=100a/ s *pulse test : pulse width 300 s, duty cycle 2% recommended soldering footprint unit : mm
cystech electronics corp. spec. no. : c143v8 issued date : 2016.06.13 revised date : page no. : 4/9 mtb020a03kv8 cystek product specification typical characteristics : typical output characteristics 0 5 10 15 20 25 30 35 40 012345 v ds , drain-source voltage(v) i d , drain current(a) v gs =3v 10v, 9v, 8v, 7v, 6v, 5v 3.5v 4v brekdown voltage vs ambient temperature 0.4 0.6 0.8 1 1.2 1.4 -75 -50 -25 0 25 50 75 100 125 150 175 tj, junction temperature(c) bv dss , normalized drain-source breakdown voltage i d =250 a, v gs =0v static drain-source on-state resistance vs drain current 10 100 1000 0.01 0.1 1 10 100 i d , drain current(a) r ds(on) , static drain-source on-state resistance(m) v gs =10v v gs =4.5v reverse drain current vs source-drain voltage 0.2 0.4 0.6 0.8 1 1.2 024681 i dr , reverse drain current(a) v sd , source-drain voltage(v) 0 tj=25c tj=150c static drain-source on-state resistance vs gate-source voltage 0 10 20 30 40 50 60 70 80 90 100 024681 0 drain-source on-state resistance vs junction tempearture 0.4 0.8 1.2 1.6 2 -75 -50 -25 0 25 50 75 100 125 150 175 tj, junction temperature(c) r ds(on) , normalized static drain- source on-state resistance v gs =10v, i d =10a r ds( on) @tj=25c : 15.2m typ. v gs , gate-source voltage(v) r ds(on) , static drain-source on- state resistance(m) i d =10a
cystech electronics corp. spec. no. : c143v8 issued date : 2016.06.13 revised date : page no. : 5/9 mtb020a03kv8 cystek product specification typical characteristics(cont.) : capacitance vs drain-to-source voltage 10 100 1000 0 5 10 15 20 25 30 v ds , drain-source voltage(v) capacitance---(pf) c oss ciss crss threshold voltage vs junction tempearture 0.4 0.6 0.8 1 1.2 1.4 -75 -50 -25 0 25 50 75 100 125 150 175 tj, junction temperature(c) v gs(th) , normalized threshold voltage i d =250 a i d =1ma forward transfer admittance vs drain current 0.01 0.1 1 10 0.001 0.01 0.1 1 10 i d , drain current(a) g fs , forward transfer admittance(s) v ds =10v pulsed ta=25c gate charge characteristics 0 2 4 6 8 10 0 4 8 12 16 qg, total gate charge(nc) v gs , gate-source voltage(v) i d =10a v ds =24v v ds =15v maximum safe operating area 0.01 0.1 1 10 100 0.01 0.1 1 10 100 1000 v ds , drain-source voltage(v) i d , drain current(a) dc 10ms 1ms 100 s r ds( on) limite t a =25c, tj=150c, v gs =10v r ja =84c/w,single pulse 1s 100ms maximum drain current vs junction temperature 0 1 2 3 4 5 6 7 8 25 50 75 100 125 150 175 t j , junction temperature(c) i d , maximum drain current(a) t a =25c, v gs =10v r ja =84c/w
cystech electronics corp. spec. no. : c143v8 issued date : 2016.06.13 revised date : page no. : 6/9 mtb020a03kv8 cystek product specification typical characteristics(cont.) : typical transfer characteristics 0 5 10 15 20 25 30 35 40 01234 5 single pulse power rating, junction to ambient (note on page 2) 0 10 20 30 40 50 0.001 0.01 0.1 1 10 100 pulse width(s) power (w) t j(max) =150c t a =25c r ja =84c/w v ds =10v v gs , gate-source voltage(v) i d , drain current (a) transient thermal response curves 0.001 0.01 0.1 1 1.e-04 1.e-03 1.e-02 1.e-01 1.e+00 1.e+01 1.e+02 t 1 , square wave pulse duration(s) r(t), normalized effectivetransient thermal resistance single pulse 0.01 0.02 0.05 0.1 0.2 d=0.5 1.r ja (t)=r(t)*r ja 2.duty factor, d=t 1 /t 2 3.t jm -t a =p dm *r ja (t) 4.r ja =84 c/w
cystech electronics corp. spec. no. : c143v8 issued date : 2016.06.13 revised date : page no. : 7/9 mtb020a03kv8 cystek product specification reel dimension carrier tape dimension
cystech electronics corp. spec. no. : c143v8 issued date : 2016.06.13 revised date : page no. : 8/9 mtb020a03kv8 cystek product specification recommended wave soldering condition product peak temperature soldering time pb-free devices 260 +0/-5 c 5 +1/-1 seconds recommended temperature profile for ir reflow profile feature sn-pb eutectic assembly pb-free assembly average ramp-up rate (tsmax to tp) 3 c/second max. 3c/second max. preheat ? temperature min(t s min) ? temperature max(t s max) ? time(ts min to ts max ) 100 c 150 c 60-120 seconds 150 c 200 c 60-180 seconds time maintained above: ? temperature (t l ) ? time (t l ) 183 c 60-150 seconds 217 c 60-150 seconds peak temperature(t p ) 240 +0/-5 c 260 +0/-5 c time within 5 c of actual peak temperature(tp) 10-30 seconds 20-40 seconds ramp down rate 6 c/second max. 6c/second max. time 25 c to peak temperature 6 minutes max. 8 minutes max. note : all temperatures refer to topside of the package, measured on the package body surface.
cystech electronics corp. spec. no. : c143v8 issued date : 2016.06.13 revised date : page no. : 9/9 mtb020a03kv8 cystek product specification dfn3 3 dimension marking: millimeters inches millimeters inches dim min. max. min. max. dim min. max. min. max. a 0.650 0.850 0.026 0.033 b 0.200 0.400 0.008 0.016 a1 0.152 ref 0.006 ref e 0.550 0.750 0.022 0.030 a2 0.000 0.050 0.000 0.002 l 0.300 0.500 0.012 0.020 d 2.900 3.100 0.114 0.122 l1 0.180 0.480 0.007 0.019 d1 0.935 1.135 0.037 0.045 l2 0.000 0.100 0.000 0.004 d2 0.280 0.480 0.011 0.019 l3 0.000 0.100 0.000 0.004 e 2.900 3.100 0.114 0.122 h 0.315 0.515 0.012 0.020 e1 3.150 3.450 0.124 0.136 9 13 9 13 e2 1.535 1.935 0.060 0.076 notes: 1.controlling dimension: millimeters. 2.maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.if there is any question with packing spec ification or packing method, please cont act your local cystek sales office. material: ? lead: pure tin plated. ? mold compound: epoxy resin family, flammability solid burning class: ul94v-0. important notice: ? all rights are reserved. reproduction in whole or in part is prohibited without the prior written approval of cystek. ? cystek reserves the right to make changes to its products without notice. ? cystek semiconductor products are not warranted to be suitab le for use in life-support applications, or systems. ? cystek assumes no liability for any consequence of customer pr oduct design, infringement of pat ents, or application assistance . 8-lead dfn3 3 plastic package cystek package code: v8 date code s1 g1 s2 g2 d1 d1 d2 d2 b020 a03k
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